? semiconductor components industries, llc, 2001 march, 2001 rev. 5 1 publication order number: cs8221/d cs8221 micropower 5.0 v, 100 ma low dropout linear regulator the cs8221 is a precision 5.0 v, 100 ma micropower voltage regulator with very low quiescent current (60 m a typical at 100 m a load). the 5.0 v output is accurate within 2.0% and supplies 100 ma of load current with a maximum dropout voltage of only 600 mv. the regulator is protected against reverse battery, short circuit, overvoltage, and over temperature conditions. the device can withstand 74 v peak transients making it suitable for use in automotive environments. the cs8221 is pin for pin compatible with the lm2931. features ? low quiescent current (60 m a @ 100 m a load) ? 5.0 v 2.0% output ? 100 ma output current capability ? internally fused leads in so8 package ? fault protection +74 v peak transient voltage 15 v reverse voltage short circuit thermal shutdown http://onsemi.com pin connections and marking indiagram device package shipping ordering information* cs8221ydf8 so8 95 units/rail cs8221ydfr8 d 2 pak, 3pin 2500 tape & reel cs8221ydp3 50 units/rail a = assembly location wl, l = wafer lot yy, y = year ww, w = work week so8 df suffix case 751 1 8 nc nc 1 8221 alyw 8 gnd gnd gnd gnd v in v out d 2 pak 3pin dp suffix case 418e cs8221 awlyww 1 tab = gnd pin 1. v in 2. gnd 3. v out 1 2 3 d 2 pak so8 cs8221ydpr3 so8 d 2 pak, 3pin 750 tape & reel *contact your local sales representative for to92 package option.
cs8221 http://onsemi.com 2 figure 1. block diagram bandgap reference + sense current limit gnd v out error amplifier v in current source (circuit bias) over voltage shutdown thermal protection absolute maximum ratings* rating value unit junction temperature range, t j 40 to +150 c storage temperature range, t storage 55 to +150 c power dissipation internally limited peak transient voltage (60 v load dump @ v in = 14 v) 15, 74 v input operating range 0.5 to 26 v output current internally limited electrostatic discharge (human body model) 2.0 kv lead temperature soldering: reflow (note 1.) 230 peak c 1. 60 seconds maximum above 183 . *the maximum package power dissipation must be observed.
cs8221 http://onsemi.com 3 electrical characteristics (6.0 v in 26 v, i out = 1.0 ma, 40 c t j 125 c unless otherwise noted.) characteristic test conditions min typ max unit output stage output voltage, v out 9.0 v < v in < 26 v, 100 m a i out 100 ma 6.0 v v in 26 v, 100 m a i out 100 ma 4.9 4.85 5.0 5.0 5.1 5.15 v v dropout voltage (v in v out ) i out = 100 ma i out = 100 m a 400 100 600 150 mv mv load regulation v in = 14 v, 100 m a i out 100 ma, 5.0 50 mv line regulation 6.0 v < v < 26 v, i out = 1.0 ma 5.0 50 mv quiescent current, (i q ) i out = 100 m a, v in = 6.0 v i out = 50 ma i out = 100 ma 60 4.0 12 120 6.0 20 m a ma ma ripple rejection 7.0 v in 17 v, i out = 100 ma, f = 120 hz 60 75 db current limit 125 200 ma short circuit output current v out = 0 v 40 125 m a thermal shutdown (note 2.) 150 180 c overvoltage shutdown v out 1.0 v 30 34 38 v 2. this parameter is guaranteed by design, but not parametrically tested in production. package lead description package lead # so8 d 2 pak lead symbol function 1 3 v out 5.0 v, 2.0%, 100 ma output. 2, 3, 6, 7 2 gnd ground. 4 nc no connection. 5 nc no connection. 8 1 v in input voltage.
cs8221 http://onsemi.com 4 circuit description voltage reference and output circuitry output stage protection the output stage is protected against overvoltage, short circuit and thermal runaway conditions (figure 2). figure 2. typical circuit waveforms for output stage protection i out load dump v in v out thermal shutdown short circuit > 30 v if the input voltage rises above 30 v, the output shuts down. this response protects the internal circuitry and enables the ic to survive unexpected voltage transients. should the junction temperature of the power device exceed 180 c (typ) the power transistor is turned off. thermal shutdown is an effective means to prevent die overheating since the power transistor is the principle heat source in the ic. figure 3. application and test diagram c 1 * 0.1 m f v out c 2 ** 10 m f cs8221 *c 1 is required if regulator is far from the power source filter . **c 2 is required for stability. v in gnd application notes stability considerations the output or compensation capacitor helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. the capacitor value and type should be based on cost, availability, size and temperature constraints. a tantalum or aluminum electrolytic capacitor is best, since a film or ceramic capacitor with almost zero esr can cause instability. the aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (25 c to 40 c), both the value and esr of the capacitor will vary considerably. the capacitor manufacturers data sheet usually provides this information. the value for the output capacitor c out shown in figure 3 should work for most applications, however it is not necessarily the optimized solution. to determine an acceptable value for c out for a particular application, start with a tantalum capacitor of the recommended value and work towards a less expensive alternative part. step 1: place the completed circuit with a tantalum capacitor of the recommended value in an environmental chamber at the lowest specified operating temperature and monitor the outputs with an oscilloscope. a decade box connected in series with the capacitor will simulate the higher esr of an aluminum capacitor. leave the decade box outside the chamber, the small resistance added by the longer leads is negligible. step 2: with the input voltage at its maximum value, increase the load current slowly from zero to full load while observing the output for any oscillations. if no oscillations are observed, the capacitor is large enough to ensure a stable design under steady state conditions. step 3: increase the esr of the capacitor from zero using the decade box and vary the load current until oscillations appear. record the values of load current and esr that cause the greatest oscillation. this represents the worst case load conditions for the regulator at low temperature. step 4: maintain the worst case load conditions set in step 3 and vary the input voltage until the oscillations increase. this point represents the worst case input voltage conditions. step 5: if the capacitor is adequate, repeat steps 3 and 4 with the next smaller valued capacitor. a smaller capacitor will usually cost less and occupy less board space. if the output oscillates within the range of expected operating conditions, repeat steps 3 and 4 with the next lar ger standard capacitor value. step 6: test the load transient response by switching in various loads at several frequencies to simulate its real working environment. vary the esr to reduce ringing. step 7: increase the temperature to your highest operating temperature. vary the load current as instructed in step 5 to test for any oscillations.
cs8221 http://onsemi.com 5 once the minimum capacitor value with the maximum esr is found, a safety factor should be added to allow for the tolerance of the capacitor and any variations in regulator performance. most good quality aluminum electrolytic capacitors have a tolerance of 20% so the minimum value found should be increased by at least 50% to allow for this tolerance plus the variation which will occur at low temperatures. the esr of the capacitor should be less than 50% of the maximum allowable esr found in step 3 above. calculating power dissipation in a single output linear regulator the maximum power dissipation for a single output regulator (figure 4) is: p d(max) v in(max) v out(min) i out(max) v in(max) i q (1) where: v in(max) is the maximum input voltage, v out(min) is the minimum output voltage, i out(max) is the maximum output current for the application, and i q is the quiescent current the regulator consumes at i out(max) . once the value of p d(max) is known, the maximum permissible value of r q ja can be calculated: r ja 150 c t a p d (2) the value of r q ja can then be compared with those in the package section of the data sheet. those packages with r q ja 's less than the calculated value in equation 2 will keep the die temperature below 150 c. in some cases, none of the packages will be sufficient to dissipate the heat generated by the ic, and an external heatsink will be required. figure 4. single output regulator with key performance parameters labeled cs8221 i out i in i q v in v out heat sinks a heat sink effectively increases the surface area of the package to improve the flow of heat away from the ic and into the surrounding air. each material in the heat flow path between the ic and the outside environment will have a thermal resistance. like series electrical resistances, these resistances are summed to determine the value of r q ja . r ja r jc r cs r sa (3) where: r q jc = the junctiontocase thermal resistance, r q cs = the casetoheatsink thermal resistance, and r q sa = the heatsinktoambient thermal resistance. r q jc appears in the package section of the data sheet. like r q ja , it too is a function of package type. r q cs and r q sa are functions of the package type, heatsink and the interface between them. these values appear in heat sink data sheets of heat sink manufacturers.
cs8221 http://onsemi.com 6 package dimensions so8 df suffix case 75107 issue w d 2 pak 3pin dp suffix case 418e01 issue o seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 x y g m y m 0.25 (0.010) z y m 0.25 (0.010) z s x s m t dim min max min max millimeters inches a 0.326 0.336 8.28 8.53 b 0.396 0.406 10.05 10.31 c 0.170 0.180 4.31 4.57 d 0.026 0.036 0.66 0.91 e 0.045 0.055 1.14 1.40 f 0.090 0.110 2.29 2.79 g 0.100 bsc 2.54 bsc h 0.098 0.108 2.49 2.74 j 0.018 0.025 0.46 0.64 k 0.204 0.214 5.18 5.44 m 0.055 0.066 1.40 1.68 n 0.000 0.004 0.00 0.10 notes: 1. dimensions and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. b a k m e c seating plane f h j d 3 pl g t m 0.13 (0.005) m b 123 4 l l 0.045 0.055 1.14 1.40 package thermal data parameter so8 d 2 pak, 3pin unit r q jc typical 25 4.2 c/w r q ja typical 110 1050* c/w * depending on thermal properties of substrate. r q ja = r q jc = r q ca
cs8221 http://onsemi.com 7 notes
cs8221 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 13036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. cs8221/d smart regulator is a registered trademark of semiconductor components industries, llc (scillc). north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland
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